Senior Systems Architect

Req ID: 1604

Micron's DRAM Solutions Group (DSG) is chartered to identify, define, and develop new and innovative memory products and market strategies which position Micron as a leader as well as generate new profitable growth opportunities. You will work with a senior, highly focused team with diverse expertise to develop system capabilities for processing near memory. Responsibilities will include working with memory design engineers, ASIC engineers, and systems and computer architects, software and firmware engineers.

Your responsibilities will include, but are not limited to:

- Actively working with customer system architects, technologists, 3rd party developers, and Micron R&D to identify, define, and architect novel and innovative memory solutions. Depending on prioritization of resources and market opportunities, you will develop technology within one of the following areas of potential growth:
- Enhancing margins by displacing existing solutions through the application of new technologies with functionally more optimal price/performance feature sets, or
- Breakthrough products that target existing memory markets, through the application of new system level architectures and technologies delivering radically improved performance and feature sets, or
- New products that create new consumption, new markets, through the application of innovative memory architectures and technologies
- Establishing and maintaining strong technical relationships with customer and partner system architects and key technologists to identify and define new innovative memory products.
- Working with Micron technologists, design engineers, and engineering teams to ensure successful implementation and feasibility demonstration of revolutionary new product concepts while staying abreast of new advanced technology and architecture trends in the market.
- Generating new intellectual property and patents, and attending and representing Micron at appropriate industry consortia, technical organizations, and technical conferences while evangelizing Micron's new products, technologies, and capabilities.
- Performing open- and closed-loop system performance analysis of new advanced memory architectures in comparison with existing paradigms.
- Working with internal engineering teams and external customers to optimize and characterize new memory components, functions, and architectures.
- Choosing or developing the appropriate simulation tools/environment; constructing or modifying component models including memory devices, controllers, processors; verification, generating or acquiring relevant workloads; constructing performance monitoring means (eg energy, cycles, statistics gathering, etc.).
- Creating timing approximate and cycle accurate models as well as analyzing the performance results and provide guidance as far as micro-architecture choices. This will include calibration, integration and documentation of the models into larger SoC level performance models.

Successful candidates for this position will have:

- A minimum of 10 years industry experience.
- Direct experience in one or more of the following areas:
- System level design and/or application experience in one or more of the following areas: mobile devices (mobile phones, PDAs, etc.), networking (routers, switches, and appliances), advanced computing systems, imaging & graphics, mass storage sub-systems
- Performance simulation and modeling.
- Memory subsystem and/or controller design and architecture.
- Establishing industry relationships with customers, and technology developers.
- Proven track record in innovative product definition and development, and experience in the design and/or application of innovative memory and memory subsystems.
- A strong understanding of memory technologies, semiconductor process technology, design, test, and manufacturing required.
- Ability to be highly self-motivated with excellent verbal and written communication skills.
- Ability to work well with other engineers, as well as customers and partners of various positions.
- Exposure to HDL development flows and processes.
- Excellent problem solving and troubleshooting skills.
- Excellent verbal communication and written skills.
- Ability to be highly organized and self motivated.
- Strong working knowledge of architecture tradeoff analysis and modeling tools, commercial and in-house with ability guide development of cycle-accurate system-level models to drive SoC development
- Exposure to various bus protocols (AMBA, CoreConnect, OCP) and network on chip and ability to assess performance and design tradeoffs, as well assist with development of new protocols.

Education:

MS in Electrical Engineering is required with PHD a plus.

Keywords: Boise -- Idaho (US-ID) -- United States (US) -- DSG -- Experienced -- Regular -- Engineering --.LI-MP1 --